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r o f e t o v s l P t s e B r o f e n O t p y r C P I e v i t a v o Inn 100% safe IP Core? e z ri p CryptOne as an example of ew generation of secured IP Core Jacek Hanke, CEO Digital Core Design

hanghai, China, Septemeber 12th, 2019 Agenda 1.About Digital Core Design 2.Milestones 3.Security vs hardware 4.CryptOne 5.Summary tive a v o n n I Best r o f e ptOn y r C r o f Pls vote prize Digital Core Design, All Rights Reserved, 2019 Digital Core Design Digital Core Design has been founded in 1999 and since the early beginings is focused in IP Cores improvement and System-on-Chip designs, During these two decades, DCDs launched more than 70 different architectures, among them e.g. Worlds Fastest 8051 the DQ80251 and royalty-free 32-bit CPU - the D32PRO, DCD has sold more than 1000 license to various customers like corporations start-ups, R&D offices, universities and so

e IP v i t a v o n e s t In B r o f One t p y r C r fo Pls vote prize on. gital Core Design, All Rights Reserved, 2019 Milestones CryptOne, 100% safe crypto CPU D32PRO awarded with the Teraz Polska Prize e IP v i t a v o

n est In B r o f One t p y r C r fo Pls vote prize 16 19 17 D32PRO, D32PRO named royalty-free 32Polish Product DCD among 4 bit CPU of the Future most innovative EDN's Hot companies in Product of DQ80251, Products of Poland the Year Worlds Fastest DoCDTM 2012 for Award 8051 DRPIC 166X IP

DQ80251 & DP8051XPHardware DQ80251 Core EDN Hot 1999 DCD IP Core Debugger DoCD 100 Products establishe 15 d 99 02 05 2011 13 12 12 13 14 DQ80251 presented at CeBIT 2013 opening ceremony DCDs IP Cores IP e v i t a v o

t Inn s e B r o One f t p y r C r fo Pls vote prize our office 500 custome rs 1000 licenses More than 500 000 000 devices DCDs IP Cores One of the most experienced companies in IP Core market More than 70 architectures in portfolio including 8-bit, 16-bit, 32-bit MCU, UART, I2C, SPI, I3C, Among them Worlds Fastest & Worlds Smallest

8051 & USB, CAN, CAN-FD LIN, floating points ... 80251 Deeply embedded, royalty-free, fully scalable 32-bit CPU IP Cores tailored to the project needs Technology independent (ASIC & FPGA) Royalty-free solutions tive a v o n n I Best r o f e ptOn y r C r o f Pls vote prize Security, stupid* There are a range of attack types... Communication attacks: Man in the Middle, Weak RNG, Code vulnerabilities

Encryp tion Isolati on Securit y servic es Life Cycle Attacks: Code Antitampe ring e IP v i t a v o n e s t In B r o f One t p y r C r fo Pls vote prize * Paraphrised: Bill Clinton 1993 It's the economy, stupid Software Attacks: Buffer overflows,

Interrupts, Malware etc. downgrade, Excess manufacturing, Integrity vulnerabilities Physical Attacks: Fault injection: clock or power glitch, alpha ray, Side Channel Analysis (SCA), Probing, Focused in Beam (FiB) etc. Secu rity is impo rtant? tive a v o n n I Best r o f e ptOn y r C r o f Pls vote prize y security in HW is better than

P Faster: HW cryptography performs the encryption and decryption many times the speed of SW implementation, 10 9 Higher Performance, Lesser Code size, Application Integrity Assurance: hardware root of trust is more secure & higher assurance of code integrity over 8 7 6 5 software, 4 Resistance to Reverse Engineering: SF is more susceptible to RE 3 2 Resistance to Non-intrusive Attacks: SF is more vulnerable to attacks that are based on power consumption analysis Higher level of Key Protection: keys are stored in HW ve Innovati IP 1 0 Cryptographic Engine Cryptographic Library ecurity vs hardware When implementing security countermeasures on an IoT device, best done using hardware based security

Ready for the highest Security level Software attacks Microarchitecur al attacks Physical attacks IP ovative Isolated Software Security IP (HSM) HWbased security Cryptone CryptOne is a 100% safe crypto CPU, because... It involves the use of RSA asymmetric encryption scheme to realize a cryptosystem with a one-time pad (OTP), DCDs solution is a broadly defined crypto system solution based on an asymmetric RSA with a hidden value of a component of a public key susceptible to crypto

analysis and implementing the OTP rules, Nowadays security is the key - thats why CryptOne Digital Core Design, All Rights Reserved, 2019 IP e v i t a v o t Inn s e B r o ne f O t p y r C for Pls vote prize Cryptone CryptOne core is a universal, fully scalable solution which is able to boost asymmetric cryptographic algorithms like: RSA, Diffie-Hellman and ECC; It provides the efficient solution for asymmetric cryptography boosting arithmetic operations like: modular exponentiation, multiplication, inversion, GCD finding as also point doubling; The energy efficient architecture of CryptOne IP core enables the usage of the very small silicon footprint with high processing speeds.

Digital Core Design, All Rights Reserved, 2019 tive a v o n n I Best r o f e n ptO y r C r o f Pls vote prize IP 00% safe crypto CPU CryptOne can be provided with various different interfaces including AMBA AHB, AXI4, APB; Very intuitive interface enables the fast, straightforward system integration; The core is resistant to the Differential Power Attacks (DPA) and timing attacks.

ve IP i t a v o n n est I B r o f t One p y r C r o f Pls vote prize ryptOnes features: CryptOne constant time algorithms: Modular exponentiation, Parallel modular exponentiation CRT ECDSA sign/verify ECDH Elliptic curve point multiplication Modular multiplicative inverse GCD Modular reduction Multiplication Division Cryptographic algorithm applications: ECDSA, ECDH RSA key generation RSA Sign/Verify/Encrypt/Decrypt Diffie-Hellman schemes Miller-Rabin Primality check System applications: Client-server communication: Sensor networks

SSL/TLS stacks IoT devices Embedded security/ID devices AMBA AHB, AXI4, APB interface ready Rapid & easy development with delivered API Patent pending architecture Algorithms resistant against SPA and timing attacks CryptOne elliptic curves with native support: NIST P-192 NIST P-224 NIST P-256 NIST P-384 Koblitz P-192 Koblitz P-256 Koblitz P-384 Brainpool P-256 Brainpool P-384 Brainpool P-512 Other/custom curves optional support Software support: OpenSSL engine MbedTLS port OS independent crypto library tive a v o n n I Best r o f e ptOn y

r C r o f Pls vote prize yptOne choose the best for yo CryptOne RSA Modular Exponentiation constant time operation algorithm support Parallel Modular Exponentiation CRT constant time operation algorithm support Secure private RSA key computation, no branch inversion Easy to use software library interface CryptOne EC Elliptic Curves point multiplication constant time algorithm Constant time modular multiplicative inverse algorithm for private operations. Boost modular multiplicative inverse algorithm for public operations Native support for most popular elliptic curves Easy to use software library interface CryptOne TLS Modular Exponentiation constant time operation algorithm support Modular Exponentiation CRT constant time operation algorithm support Secure private RSA key computation, no branch inversion Elliptic Curves point multiplication constant time algorithm Constant time modular multiplicative inverse algorithm for private operations Boost modular multiplicative inverse algorithm for public operations Native support for most popular elliptic curves Modular Reduction constant time algorithm

Common Divisor algorithm P IGreatest e v i t a v Inno t s e B r MbedTLS and OpenSSL port libraries n e fo O t p y r C for e t o v s l P Software interface and examples for building own prize hardware algorithms with support for: Large vector addition/subtraction Large vector shift right/left Large vector modular multiplication Branch, execution flow controls 00% safe crypto CPU CryptOne consists of technologically independent hardware crypto processor in the form of synthesizable IP Core module prepared for integration and implementation in an IC (ASIC or FPGA) CryptOne offers both software

and hardware cryptography advantages IP e v i t a v o t In n s e B r o ne f O t p y r C for Pls vote prize SOFTWARE CryptOne Hardware & software co-design SOFTWARE Test stimulation vectors are generated with the usage if D32PRO Simulator the sub-module for RSA crypter is written in C++ All tests are written in C using D32PRO software they HARDWARE can be easily used in hardware through D32PRO platform Generated stimulation vectors are also used for reference comparison All internal data is exchanged through the AXI4-Stream protocol in simple format = higher flexibility

The internal RSA CRYPT MODULE can work in naovseparate ative IP domain t In s e B r o ne f O t p y r C for Pls vote prize Receiveables C software drivers with API Silicon proven architecture Hardware code: VERILOG Source Code or FPGA Netlist VERILOG test bench environment ve IP i t a v o n n est I B r o f t One p y

r C r o f Pls vote prize Technical documentation Synthesis scripts 12 months of free technical support included Summary Success stories are the best confirmation for DCDs quality vativ o n n I t s r Be o f e n O t ryp C r o f e t Pls vo prize Why DCD? e IP v i t

a v o n est In B r o f One t p y r C r fo Pls vote prize Two decades of IP Core market experience Why DCD? IP e v i t a v o t Inn s e B r o ne f O t p y r

C for Pls vote prize DCD presented Worlds fastest 8051 CPU during CeBIT 2013 official opening ceremony (in front of German Chancellor A. Merkel and EU President D. Tusk) D32PRO has been presented during EXPO in Milan and Hannover Messe Why DCD? ativ v o n n I t Bes r o f e n yptO r C r o f e Pls vot prize Innovative products always step ahead before competitors Know-how based on two decades of market exprience Optimal solutions which answers market needs Significant Time-to-market reduction Coherent IP Core portfolio IP Cores tailored to the project needs Complete solution from one company like e.g.: IP Core + debugger + ... r o f

e t o v s l P t s e B r o f e n O t p y r C P I e v i t a v o I nn e z pri Thank you! Any questions? [email protected]

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