EECS 252 Graduate Computer Architecture Lec 01 - Introduction

EECS 252 Graduate Computer Architecture Lec 01 - Introduction

CSE351 Course Project Tutorial By Dongyuan Zhan [email protected] Objectives The three projects will lead you to eventually create your own prototype OS on a bare-system FPGA board. Gain genuine understanding of the OS kernel principles from hands-on experience. Practice efficient teamwork and effective project management skills that make your work splendid. 01/24/20 CSE351 Course Project Tutorial

2 Overview 01/24/20 CSE351 Course Project Tutorial 3 Tasks One Lab + Three Projects (on a team basis, accounting for 40% of your final grade) Pre-project Lab (0%, by 09/21) : to prepare you for the projects Project I (5%, by 10/05): to design a timer interrupt handler

Project II (20%, by 11/13): to devise multithreading and scheduling mechanisms Project III (15%, by 12/07): to provide a synchronization mechanism for the coordination among multiple threads 01/24/20 CSE351 Course Project Tutorial 4 Teams 18 teams have been formed, with 2-3 members in each group http://www.flickr.com/photos/[email protected]/ sets/72157627524789258/detail/ Each group should have a team leader who

schedules and coordinates group events and submits your work to the hand-in system. Each team will be provided 2 FPGA boards. You can use your personal computer or a Lab machine to manipulate the boards, as long as the required software is installed. 01/24/20 CSE351 Course Project Tutorial 5 Infrastructure Hardware the Altera DE-2/DE-1 board Software

Quartus-II Web Edition 11.0sp1 It also includes the Nios-II v11.0 Software Build Tools for Eclipse https://www.altera.com/download/software/quartus -ii-we/11.0sp1 (download registration required) Virtualbox (only for Mac users) http://www.virtualbox.org/wiki/Mac%20OS%20X %20build%20instructions 01/24/20 CSE351 Course Project Tutorial 6 Infrastructure

Software USB Blaster Driver It enables DE-2 to communicate with your computer How to install it can be found at WINXP: http://www.altera.com/download/drivers/usb-bla ster/dri-usb-blaster-xp.html WIN7/VISTA: http://www.altera.com/download/drivers/usb-bla ster/dri-usb-blaster-vista.html 01/24/20 CSE351 Course Project Tutorial 7

Infrastructure Software Nios-II Soft-Core CPU It is essentially a VHDL/Verilog design that configures the FPGA to function as a CPU. DE2 Version: http://cse.unl.edu/~dzhan/wiki/images/DE2_NIOSII.zip DE1 Version: http://cse.unl.edu/~dzhan/wiki/images/DE1_NIOSII.zip 01/24/20 CSE351 Course Project Tutorial 8

USB Blaster Port Altera DE-2 Board Power Button FPGA 01/24/20 CSE351 Course Project Tutorial 9 Altera DE-1 Board

USB Blaster Port FPGA Power Button 01/24/20 CSE351 Course Project Tutorial 10 Steps Download the Nios-II Soft CPU to the FPGA Platform http://cse.unl.edu/~dzhan/wiki/index.php5/Cse351:Fall

_2011:Pre_Project_Lab#Download_the_Nios-II_Soft_ CPU_to_the_FPGA_Platform Create a Nios-II C Project http://cse.unl.edu/~dzhan/wiki/index.php5/Cse351:Fall _2011:Pre_Project_Lab#Create_a_Nios-II_C_Project Build the Project http://cse.unl.edu/~dzhan/wiki/index.php5/Cse351:Fall _2011:Pre_Project_Lab#Build_the_Project 01/24/20 CSE351 Course Project Tutorial 11

Steps Observe the FPGA Platform Output http://cse.unl.edu/~dzhan/wiki/index.php5/Cse351:Fall _2011:Pre_Project_Lab#Observe_the_FPGA_Platform _Output Debug the Project http://cse.unl.edu/~dzhan/wiki/index.php5/Cse351:Fall _2011:Pre_Project_Lab#Debug_the_Project 01/24/20 CSE351 Course Project Tutorial 12 Milestones

Pre-Lab (by Sep. 21) No submission is required Project I (by Oct. 5) The design and report need to be submitted Project II (by Nov. 13) The design and report need to be submitted Project III (by Dec. 7) The design and report need to be submitted 01/24/20 CSE351 Course Project Tutorial 13

Grading Criteria Following is the grading criteria with a total of 100 points for any projects. But different projects may carry different weights in your final grade. Project report: 50% Correctness of the program: 40% Detailed source code comments and README: 10% Typically, all members in a team will get the same grade for a project, unless the team leader or other members report to the lab TA that someone contributes little to the project and he/she should get only a certain percentage (e.g., 90%) of the teams grade. 01/24/20

CSE351 Course Project Tutorial 14 Some Suggestions for Your Success Start as early as you can! Do good project management (e.g., risk anticipation) http://en.wikipedia.org/wiki/Project_management Do efficient teamwork Use version control system to manage your source code SVN/Mecurial/Git (on Windows/Unix) http://code.google.com/hosting/createProject Be active in discussing with the TAs

01/24/20 CSE351 Course Project Tutorial 15 Resources Nios-II Software Developer's Handbook http://cse.unl.edu/~dzhan/wiki/images/Nios-II_Handbo ok.pdf Instruction Set Reference for Nios-II Soft CPUs http://cse.unl.edu/~dzhan/wiki/images/Instruction_Set_ Reference_for_Nios-II_Soft_CPUs.pdf Hardware Abstraction Layer API Reference http://cse.unl.edu/~dzhan/wiki/images/

Hardware_Abstraction_Layer_API_Reference.pdf 01/24/20 CSE351 Course Project Tutorial 16 Resources Using Assembly in the C Source http://cse.unl.edu/~dzhan/wiki/images/ Using_Assembly_in_the_C_Source.pdf C & ASM in Nios-II http://cse.unl.edu/~dzhan/wiki/images/C %26ASM_in_Nios-II.pdf

Altera Document Center http://www.altera.com/literature/lit-index.html Altera Development Forum http://www.alteraforum.com/ 01/24/20 CSE351 Course Project Tutorial 17 Q&A Enjoy Your Course Projects!

01/24/20 CSE351 Course Project Tutorial 18

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