IT 251 Computer Organization and Architecture

IT 251 Computer Organization and Architecture

IT 252 Computer Organization and Architecture Introduction Chia-Chi Teng What is computer architecture about? Computer architecture is the study of building computer systems. IT 252 is roughly split into four parts. First, we will discusses instruction set architecturesthe bridge between hardware and software. Second, we introduce more advanced processor implementations. The focus is on pipelining, which is one of the most important ways to improve performance. Next, we talk about memory systems, I/O, and how to connect

it all together. We will also introduce you to Assembly and C programming through out the course. Why should you care? It is interesting. You will learn how a processor actually works! It will help you be a better programmer. Understanding how your program is translated to assembly code lets you reason about correctness and performance. Demystify the seemingly arbitrary (e.g., bus errors, segmentation faults) Many cool jobs require an understanding of computer architecture. The cutting edge is often pushing computers to their limits.

Supercomputing, games, portable devices, etc. Computer architecture illustrates many fundamental ideas in all computing discipline. Abstraction, caching, and indirection Personnel Lecturer Prof. Chia-Chi Teng [email protected] Office hours T/Th 9-11 Or by appointment TA Gary McGregor [email protected] Office hours

T F Course webpage: http://it252.groups.et.byu.net/11wi/IT252.php Administrivia The textbooks provides the most comprehensive coverage "Computer Systems: A Programmer's Perspective" 2nd Edition, by Randal E. Bryant & David R. O'Hallaron The C Programming Language, Kernighan & Ritchie, 2nd ed. Read the text prior to class class will supplement rather than regurgitate the text

IT curriculum changes in Fall 2010 IT 251 (4) -> IT 252 (3) IT 104B (2) -> CS/ECEn 124 (3) IT 104A (2) -> part of IT 327 (4) Did you take 104 or 124? Grading Professionalism: Attendance, Attitude, Participation, 5% final

grade Homework Usually due on every Friday and Monday, check course website often for detail and update, 25% final grade Quizzes - about 6 8, take home, 10 pts each, 15% final grade Lab reports Due date to be specified by TA, 25% final grade Exams - final and at least one mid-term; usually open-book, take home, untimed 30% Homework Homework exercises provide added impetus to keep up with the reading. Textbook problems Assignments are listed on course web page by weeks, usually due on Friday and the following Monday. AND in paper.

Turn in: on blackboard Homework locker. We really want to encourage discussion, both in class and in lab. But zero tolerance for cheating, dont go there. Dont look for solutions online. Labs No lab this week. Lab 1 next week. Room 335 Hardware Description Language (VHDL), CPU design Room 365

Memory system, I/O Lab report: TA will give you detail To-Do list Read chapter 1 before Thursday please read the entire course web thoroughly, today Course web is work in progress, please check back often make sure youre on the IT 252 blackboard email list, and check your email daily keep up with the reading: this week homework due

Check website lab report due TA discretion via blackboard What is Computer Architecture? Its the study of the ___________ of computers Structure: static arrangement of the parts Organization: dynamic interaction of the parts and their control Implementation: design of specific building blocks Performance: behavioral study of the system or of some of its components 01/29/20 10 Another definition: Instruction Set

Architecture (ISA) Architecture is an interface between layers ISA is the interface between hardware and software ISA is what is visible to the programmer (and ISA might be different for OS and applications) ISA consists of: instructions (operations and how they are encoded) information units (size, how they are addressed etc.) registers (or more generally processor state) input-output control 01/29/20 11 Computer structure: Von Neumann model Data path CPU Memory

hierarchy control Registers + Control ALU I/O PC state Memory bus 01/29/20 I/O bus

12 Computer Organization Organization and architecture often used as synonyms Organization (in this course) refers to: what are the basic blocks of a computer system, more specifically basic blocks of the CPU basic blocks of the memory hierarchy how are the basic blocks designed, controlled, connected? Organization used to be transparent to the ISA. Today more and more of the ISA is exposed to the user/compiler. 01/29/20

13 Moores Law In 1965, Gordon Moore predicted that the number of transistors that can be integrated on a die would double every 18 to 24 months (i.e., grow exponentially with time). Amazingly visionary million transistor/chip barrier was crossed in the 1980s. 2300 transistors, 1 MHz clock (Intel 4004) - 1971 16 Million transistors (Ultra Sparc III) 42 Million transistors, 2 GHz clock (Intel Xeon) 2001 55 Million transistors, 3 GHz, 130nm technology, 250mm 2 die (Intel Pentium 4) - 2004 140 Million transistor (HP PA-8500) Illustration of Moores Law

Power Dissipation 01/29/20 16 Evolution of Intel Microprocessor Speeds 4000 3500 3000 Speed (MHz) 2500 How about today? 2000

1500 1000 500 0 1971 1974 1979 1982 1985 1989 1993 1997 1998 1999 2000 2001 2002 2003 Year 01/29/20 17 POLL Which type of CPU has the largest worldwide market share? Intel AMD ARM MIPS

http://www.polleverywhere.com/mult iple_choice_polls/LTE2OTY2MjI Where is the Market? Millions of Computers 1200 1122 1000 892 Embedded Desktop Servers 862

800 600 488 400 290 200 0 93 3 1998 114 3 1999 135 4 2000 129

4 2001 131 5 2002 ISA Type Sales Other SPARC Hitachi SH PowerPC Motorola 68K MIPS IA-32 ARM 1400 Millions of Processor

1200 1000 800 600 400 200 0 1998 1999 2000 2001 Whats in your cell phone? 2002 Processor Performance Increase Performance (SPEC Int)

10000 Intel Pentium 4/3000 DEC Alpha 21264A/667 DEC Alpha 21264/600 Intel Xeon/2000 1000 DEC Alpha 4/266 100 DEC AXP/500 DEC Alpha 5/500 DEC Alpha 5/300 IBM POWER 100 HP 9000/750

10 SUN-4/260 1 1987 IBM RS6000 MIPS M2000 MIPS M/120 1989 1991 1993 1995 Year

1997 1999 2001 2003 DRAM Capacity Growth 1000000 64M Kbit capacity 100000 512M 256M 128M 16M 4M

10000 1M 1000 256K 64K 100 16K 10 1976 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 Year of introduction Impacts of Advancing Technology Processor logic capacity:

performance: increases about 30% per year 2x every 1.5 years ClockCycle = 1/ClockRate 500 MHz ClockRate = 2 nsec ClockCycle 1 GHz ClockRate = 1 nsec ClockCycle 4 GHz ClockRate = 250 psec ClockCycle Memory DRAM capacity: memory speed: cost per bit: Disk capacity: 4x every 3 years, now 2x every 2 years 1.5x every 10 years

decreases about 25% per year increases about 60% per year Example Machine Organization Workstation design target 25% of cost on processor 25% of cost on memory (minimum memory size) Rest on I/O devices, power supplies, box Computer CPU Memory Devices Control Input Datapath

Output PC Motherboard Closeup Inside the Pentium 4 Processor Chip Some Computer families Computers that have the same (or very similar) ISA Compatibility of software between various implementations IBM 704, 709, 70xx etc.. From 1955 till 1965 360, 370, 43xx, 33xx From 1965 to the present Power PC DEC PDP-11, VAX From 1970 till 1985 Alpha (now Compaq, now HP) in 1990s

01/29/20 27 More computer families Intel Early micros 40xx in early 70s x86 (086,,486, Pentium, Pentium Pro, Pentium 3, Pentium 4) from 1980 on IA-64 (Itanium) in 2001 SUN Sparc, Ultra Sparc 1985 0n MIPS-SGI Mips 2000, 3000, 4400, 10000 from 1985 on CISC vs RISC

Complex Instruction Set vs Reduced Instruction Set What is an instruction? 01/29/20 28 Where Are We Now? CS142 & 124 IT344 Registers Registers are the bricks of the CPU Registers are an essential part of the ISA Visible to the hardware and to the programmer Registers are

Used for high speed storage for operands. For example, if variables i,j are in registers ax,cx respectively add ax,cx #i=i+j Easy to name (most computers have limited number of registers visible to the programmer) Used for addressing memory 01/29/20 31 Registers (ctd) Not all registers are equal Some are special-purpose (e.g. program counter, stack pointer) Some are used for integer and some for floating-point Some have restricted use by convention 01/29/20

32 Memory system Memory is a hierarchy of devices with faster and more expensive ones closer to CPU Registers Caches (hierarchy: on-chip, off-chip) Main memory (DRAM) Secondary memory (disks) 01/29/20 CSE378 Gen. Intro 33 Information units

Basic unit is the bit (has value 0 or 1) Bits are grouped together in units and operated on together: Byte = 8 bits Word = 2 or 4 bytes Double word = 2 words Etc. Integer: usually 4 bytes 01/29/20 CSE378 Gen. Intro 34 Memory addressing Memory is an array of information units Each unit has the same size

Each unit has its own address Address of an unit and contents of the unit at that address are different 0 1 2 -123 17 0 contents address 01/29/20 35 Addressing

In most of todays computers, the basic unit that can be addressed is a byte. (how many bit is a byte?) MIPS (and pretty much all CPU today) is byte addressable The address space is the set of all memory units that a program can reference The address space is usually tied to the length of the registers Intel 384/486/Pentium has 32-bit registers. Hence its basic address space is 4G bytes MIPS has 32-bit registers. Older micros (minis) had 16-bit registers, hence 64 KB address space (too small) Some current (Intel CoreX, Alpha, Itanium, Sparc, Altheon) machines have 64-bit registers, hence an enormous address space 01/29/20 36 Addressing words

Although machines are byte-addressable, 4 byte integers are the most commonly used units Every 32-bit word starts at an address divisible by 4 int at address 0 int at address 4 int at address 8 01/29/20 37 Big-endian vs. little-endian Byte order within an int: Memory address int #0

3 2 1 0 1 2 01/29/20 0 3 Little-endian (well use this) 0

1 2 3 byte int #0 Big-endian 38 The CPU - Instruction Execution Cycle The CPU executes a program by repeatedly following this cycle 1. Fetch the next instruction, say instruction i 2. Execute instruction i 3. Compute address of the next instruction, say j

4. Go back to step 1 Of course well optimize this but its the basic concept 01/29/20 39 Whats in an instruction? An instruction tells the CPU the operation to be performed via the OPCODE where to find the operands (source and destination) For a given instruction, the ISA specifies what the OPCODE means (semantics) how many operands are required and their types, sizes etc. (syntax) Operand is either

register (integer, floating-point, PC) a memory address a constant 01/29/20 40

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